基于T门的2-5混值/十值加、减运算电路设计  

Design of 2-5 mixed-valued/ten-valued operation circuits of full adder and full subtracter based on T gate

作　　者：汪鹏君[1,2] 郁军军[1] 黄道[2] 

机构地区：[1]宁波大学电路与系统研究所 [2]华东理工大学信息科学与工程学院

出　　处：《电路与系统学报》2006年第1期50-54,59,共6页Journal of Circuits and Systems

基　　金：国家自然科学基金资助项目(60273093);浙江省自然科学基金资助项目(Y104135);浙江省留学回国人员科研启动项目

摘　　要：本文通过对编码技术的研究,提出采用2-5混值编码方案研究十值运算电路;在电路具体实现过程中,借用T运算,设计2-5混值/十值T门;然后,在此基础上,按真值表直接设计2-5混值/十值全加器和全减器的运算电路。最后用PSPICE模拟验证所设计的电路具有正确的逻辑功能。2-5 mixed-valued coding to research ten-valued operation circuits by the research of coding technique is proposed in this paper. During the course of the circuit realization, the T operation is used to design 2-5 mixed-valued/ten-valued T gate Then, based on this T gate, the 2-5 mixed-valued/ten-valued full adder and full subtracter are designed directly by the truth tables. Finally, the above designed circuits are verified by PSPICE simulation.

关 键 词：2-5混值编码 T门 十值运算电路 电路设计 

分 类 号：TN79[电子电信—电路与系统]