一种高速CMOS全差分运算放大器  

A High Speed Fully Differential CMOS Op-Amp

作　　者：朱小珍[1] 朱樟明[1] 柴常春[1] 

机构地区：[1]西安电子科技大学微电子研究所,西安710071

出　　处：《半导体技术》2006年第4期287-289,299,共4页Semiconductor Technology

基　　金：国家自然科学基金(60476046);国家部委基金(51408010205DZ0164)

摘　　要：设计并讨论了一种高速CMOS全差分运算放大器。设计中采用了折叠共源共栅结构、连续时间共模反馈以及独特的偏置电路,以期达到高速及良好的稳定性。基于TSMC0.25μm CMOS工艺,仿真结果表明,在2.5V的单电源电压下,运算放大器的直流开环增益为71.9dB,单位增益带宽为495MHz(CL=0.5pF),建立时间为24ns,功耗为3.9mW。A high-speed CMOS fully differential operational amplifier was designed and discussed The operational amplifier uses the structure of folded cascode, a continuous time CMFB and unique bias circuit to reach high speed and high stability. The op-amp is designed in TSMC 0.25 μ m CMOS process with 2.5V power supply and achieved a DC open-loop gain of 71.9dB with a 495MHz unity gain frequency （CL = 0.5pF） and 24ns settling time, and dissipates 3.9mW power.

关 键 词：折叠共源共栅 共模反馈 全差分 高速 

分 类 号：TN722.77[电子电信—电路与系统]