1.9GHz CMOS低噪声放大器的结构分析与设计  

Topology Analysis and Design of a 1.9 GHz CMOS Low Noise Amplifier

作　　者：李志升[1] 李巍[1] 胡嘉盛[1] 苏彦锋 任俊彦[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203 [2]上海士康射频技术有限公司,上海200433

出　　处：《微电子学》2006年第2期220-224,共5页Microelectronics

基　　金：上海市信息委/经委2003年促进整机业与集成电路设计联动专项资助项目(04-联专-004)

摘　　要：对低噪声放大器(LNA)的结构及性能进行了详细的分析。采用SMIC 0.18μm射频CMOS工艺,设计了用于GSM1900无线接收机系统的两种不同结构的差动式LNA(电流复用式PMOS-NMOS LNA)和典型的NMOS LNA。利用Cadence-SpectreRFTM,对这两种结构的LNA进行了电路级仿真和对比分析。结果表明,在功耗相近时,PMOS-NMOS LNA能够提供比较大的电压增益,其噪声特性与NMOS LNA相近;NMOS LNA在线性度以及芯片面积上有更多的优势。The topology and performance of low noise amplifier （LNA） was analyzed in detail. Two types （current-reuse PMOS-NMOS and cascode NMOS pair） of differential LNA＇s for GSM1900 application were designed using SMIC＇s 0. 18 μm RF CMOS process. Each circuit works at the central frequency of 1 960 MHz. A number of simulations were performed with commercial Cadence-SpectreRFTM, and simulation results show that, with same power consumptions, the PMOS-NMOS LNA can provide higher gain, and its noise figure （NF） doesnrt make much difference from that of the NMOS LNA. However, the latter is more advantageous in linearity and chip area.

关 键 词：GSM射频 低噪声放大器 线性度 阻抗匹配 

分 类 号：TN722.3[电子电信—电路与系统]