CMOS集成压控振荡器设计  

Design of CMOS Integrated VCO

作　　者：谢海情[1] 曾健平[1] 刘嘉晗[1] 叶英[1] 

机构地区：[1]湖南大学应用物理系,长沙410082

出　　处：《宇航计测技术》2006年第2期47-50,共4页Journal of Astronautic Metrology and Measurement

摘　　要：通过分析CMOS差分负阻振荡器的工作原理,得到电路结构和参数的优化方案。基于0.18μm工艺,采用片上电感和可变电容,设计了一种基于开关调谐电容结构的宽可调范围的分段线性互补型交叉耦合CMOS集成压控振荡器。在提高振荡器的可调范围的同时,降低相位噪声。电路采用HSPICE进行仿真,在1.8 V电源电压下,振荡频率的变化范围为1.55 GHz^2.86 GHz,可调范围约为60%。功耗为5 mW^10 mW,相位噪声在10 MHz频率偏移处为-110 dB/Hz。The project of optimization of structure and parameters of circuit is obtained through analyses the principle of differential negative-resistance CMOS VCO（Voltage Controlled Oscillator）. A piecewise linear, wide tuning-range, complementary cross-coupled integrated voltage-controlled oscillator was designed based on tuning-capacitance structure using on-chip inductor and varactor in 0.18 tun CMOS process. The circuit could increase the frequency tuning range and decrease phase noise simultaneously. The circuit was simulated by HSPICE under supply voltage of 1.8 V. The frequency of oscillator ranged from 1.55 GHz to 2.86 GHz, and the tuning range was about 60%. Power consumption of the circuit was 5 mW to 10 mW. Phase noise was - 110 dB/Hz at an offset of 10 MHz.

关 键 词：压控振荡器 分段线性 交叉耦合 锁相环 

分 类 号：TN752.2[电子电信—电路与系统]