基于CPLD的2PSK解调器设计方案及实现  

Design scheme and realization of 2PSK demodulator based on CPLD

作　　者：王兰勋[1] 胡聪权[1] 张庆顺[1] 高芳[1] 

机构地区：[1]河北大学电子信息工程学院,河北保定071002

出　　处：《华北电力大学学报（自然科学版）》2006年第3期70-72,共3页Journal of North China Electric Power University：Natural Science Edition

摘　　要：针对2PSK信号的特点,提出了一种基于CPLD的2PSK信号解调器设计方案。此方案先将2PSK信号通过比较器等进行二值数字化,再用VHDL语言对此数字化后的二值逻辑信号进行数字滤波、延迟、逻辑运算和识别等处理,实现对2PSK信号的非相干解调。叙述了该方案的工作原理及设计思想,并用复杂可编程逻辑器件CPLD予以实现。最后,给出了程序设计和仿真波形。According to the characteristics of 2PSK signal, a 2PSK demodulator design scheme based on CPLD is suggested. The 2PSK signals are converted to binary digits by comparator. The filtering, delaying, logical operation and identification are conducted using VHDL on the processed binary signals. The unconcerned demodulation is achieved. The principles and ideas for this design are presented. The program design procedure and simulation waves are demonstrated.

关 键 词：VHDL语言 2PSK 解调 复杂可编程逻辑器件 

分 类 号：TN919.33[电子电信—通信与信息系统]