Sub-1V CMOS Voltage Reference Based on Weighted V_(gs)  

1V以下基于V_(gs)权重的CMOS恒压源(英文)

作　　者：张洵[1] 王鹏[1] 靳东明[1] 

机构地区：[1]清华大学微电子学研究所,北京100084

出　　处：《Journal of Semiconductors》2006年第5期774-777,共4页半导体学报（英文版）

摘　　要：We propose a voltage reference based on the weighted difference between the gate-source voltages of an nMOS and a pMOS operating in their saturation regions. No diodes or parasitic bipolar transistors are used, The circuit is simulated and fabricated with SMIC 0.18μm mixed-signal technology,and our measurements demonstrate that its temperature coefficient is 44ppm/℃ and its PSRR is - 46dB, It works well when Vdd is above 650mV. The active area of the circuit is about 0.05mm^2.提出了一种新型CMOS恒压源的制作方案,它基于nMOS和pMOS的饱和区栅源电压随温度变化权重不同的原理,将两者做相关运算,得到零温度系数的恒压源.该电压源没有采用二极管和寄生三极管,并用SMIC0·18μm数模混合工艺模型参数仿真并制造.测试结果表明,温度系数达到了44ppm/℃,PSRR为-46dB,650mV以上的电源电压就可以完全正常工作.芯片面积约为0·05mm2.

关 键 词：voltage reference temperature coefficient power supply rejection ratio 

分 类 号：TN432[电子电信—微电子学与固体电子学]