Design and Analysis of Analog Front-End of Passive RFID Transponders  

无源射频电子标签模拟前端的设计与分析(英文)

作　　者：胡建赟[1] 何艳[1] 闵昊[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海200433

出　　处：《Journal of Semiconductors》2006年第6期999-1005,共7页半导体学报（英文版）

基　　金：家高技术研究发展计划资助项目(批准号:2003AA1Z1280)~~

摘　　要：An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.提出了与ISO/IEC180003兼容的高频无源射频电子标签模拟前端.分析了设计中的考虑因素,尤其是射频电子标签的能量传输.基于这些分析,提出了一种新架构、高能量转换效率、低电压、低功耗、在噪声和能量波动环境下具有高性能的模拟前端.此电路在Chartered0.35μm标准CMOS工艺下实现,测试结果表明芯片能很好地满足设计要求.

关 键 词：RFID analog front-end power transmission ARCHITECTURE low power 

分 类 号：TP391.44[自动化与计算机技术—计算机应用技术]