一种高代码密度RISC结构微控器的设计  

Design of RISC Microcontroller with High Code Density

作　　者：屈文新[1] 樊晓桠[1] 

机构地区：[1]西北工业大学航空微电子中心,陕西西安710072

出　　处：《小型微型计算机系统》2006年第7期1242-1244,共3页Journal of Chinese Computer Systems

基　　金：国家"十五"国防预研项目(41308010108)资助.

摘　　要：从51系列8位微控器指令系统的分析入手,提出了一种在指令级兼容的R ISC结构8位微控器IP CORE设计.在设计中采用R ISC设计思想,如设置快速内部寄存器及设计单周期指令等方法,使该R ISC IP CORE在性能上可明显优于传统的C ISC结构,同时,仍然具备C ISC结构原有的高代码密度优点.因而,微控器IP CORE采用R ISC设计方法,是提高性能的一种有效手段.It is mentioned widely that CISC architecture has high code density but RISC architecture has efficiently instruction execute. This paper focuses on the RISC （Reduced Instruction Set Computer） architectural Mierocontroller, emphasis on the 8 bit Microcontroller . This RISC Microcontroller＇s instruction set is compatible with MCS51 Microcontroller. The performance of the Microcontroller has been greatly improved by setting multiple high-speed working register, introducing single-clock-cycle instruction, etc. The result shows that use RISC CORE method to design the Microcontroller is an efficiently way to imProve, the system performance.

关 键 词：微控器 RISC 指令系统 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]