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作 者:Xie Xiang Li Cruolin Zhang Chun Zhang Li Wang Zhihua
机构地区:[1]Dept. of Electronic Engineering, Tsinghua Univ.,Beijing 100084, P. R. China
出 处:《Journal of Systems Engineering and Electronics》2006年第2期430-436,共7页系统工程与电子技术(英文版)
基 金:This project was supported by the National"863"High Technology Programof China (2002AA1Z1420)
摘 要:An improved rate distortion optimization (RDO) algorithm in JPEG2000 is proposed. The proposed algorithm is suitable for integrated circuit (IC) implementation and can reduce 30% computational cost. A hardware architecture which includes control unit, memory, divider, data converter is also given to implement the algorithm. The circuit based on the improved algorithm is tested on FPGAs and integrated in a JPG2000 chip codec core.An improved rate distortion optimization (RDO) algorithm in JPEG2000 is proposed. The proposed algorithm is suitable for integrated circuit (IC) implementation and can reduce 30% computational cost. A hardware architecture which includes control unit, memory, divider, data converter is also given to implement the algorithm. The circuit based on the improved algorithm is tested on FPGAs and integrated in a JPG2000 chip codec core.
关 键 词:rate distortion optimization JPEG2000 integrated circuit (IC) codec core.
分 类 号:TN91[电子电信—通信与信息系统]
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