一款专用可编程语音压缩芯片的设计  

Design of a Programmable Application Specific Processor for Speech Compression

作　　者：韩大晗[1] 崔慧娟[1] 唐昆[1] 

机构地区：[1]清华大学电子工程系微波与数字通信技术国家重点实验室,北京100084

出　　处：《电声技术》2006年第6期26-29,共4页Audio Engineering

摘　　要：基于线性预测正弦激励算法模型原理,设计了一款高质量多速率语音专用处理器芯片。芯片使用可重构体系结构和超长指令字系统设计方法,将复杂度高的子程序进行优化,能够显著提高指令并行度。仿真结果表明,在该芯片上实现语音压缩编码算法,执行效率高于相同工艺水平的通用DSP,并保持原有编码质量。该处理器能够实现多种类型的语音压缩算法,可以达到对语音算法的高保密性、低复杂度、易开发性。An application special processor, which uses embedded FLASH memory VLIW （Very Long Instruction Word） system to increase the chip＇s processing ability effectively, is introduced in this paper. The enhanced ALU, multiplier and multi-accumulator are integrated in the processor to realize micro controller and DSP in a single core with improved Harvard architecture. The memory indicating register and lever register group, which can simplify sub-program are used in the chip. The micro processor is fabricated by 0.25μm CMOS which area is 25mm^2. The simulating result shows the chip working under 20 MHz has the same performance with 50MI/s general purpose DSP and maintains the original coding quality. Many types of speech compression algorithm can be implemented and easily exploited on this processor, and they can achieve high security and low complexity.

关 键 词：语音压缩 可重构体系结构 超长指令字 

分 类 号：TN912.3[电子电信—通信与信息系统]