十六位单片机IP研究与FPGA实现  

Researches on IP of 16-bit MCU and FPGA Implement

作　　者：白广治[1] 陈泉根[1] 许晏[1] 

机构地区：[1]中国工程物理研究院电子工程研究所,四川绵阳621900

出　　处：《微计算机信息》2006年第07Z期139-141,共3页Control & Automation

摘　　要：随着集成电路IC的快速发展,SoC已成为超大规模集成电路的发展趋势和新世纪集成电路的主流。由于其电路具有高复杂性,为了满足缩短开发周期和降低成本的要求,SoC的设计实现必须采用基于IP复用的设计方法。IP核的开发是SoC这种设计方法的关键和基础。本文主要以现在广为使用、功能强大的十六位单片机为模型,介绍可复用IP核的设计方法和流程,采用Verilog硬件描述语言,并用FPGA实现。With the fast development of the integrated circuit （IC）, SoC has become the trend of the very large scale integrated circuit （VLSI）, and the mainstream of the IC in the new century. Because of the high complexity of the circuit, the demands of cutting back the development cycle and of the cost-cutting, the design and realization of SoC must adopt the ways based on IP diplex. The key and foundation of SoC design is the development of IP cores. In this paper, we mainly introduce the method and the flow of designing IP cores with the model of 16 bit MCU, which has powerful function and is widely used. We realize the IP core on FPGA with Verilog HDL.

关 键 词：IP IC 片上系统 FPGA 单片机 

分 类 号：TN402[电子电信—微电子学与固体电子学] TP368.1[自动化与计算机技术—计算机系统结构]