基于随机逻辑准数字化DAC的PLD实现  

The PLD Realization of Quasi-digital Digital to Analog Converter Based on Stochastic Logic

作　　者：李永亮[1] 王福源[1] 习江涛[2] 

机构地区：[1]郑州大学信息工程学院,郑州450002 [2]卧龙岗大学

出　　处：《半导体技术》2006年第8期621-624,共4页Semiconductor Technology

基　　金：澳大利亚自然科学基金会(ARC)国际合作项目资助(LX0561454)

摘　　要：给出了一种基于随机逻辑的准数字化数模转换电路的PLD实现方法,即将绝大部分器件在PLD中实现,外部只有极少的模拟元件。介绍了设计原理,给出了仿真分析和硬件测试的结果。由于用硬件描述语言(HDL)来实现DAC功能,所实现的电路与集成电路制造工艺无关,可以方便地移植到其他设计中去,实现PLD系统设计单片化。A way to realize quasi-digital DAC based on stochastic logic on PLD chips was given. Except few analog elements, all are digital circuits which can be downloaded into PLD chips. The design principle was introduced and followed by simulation analysis and test results. Being a circuit designed by hardware description language, it is nothing to do with the technology of IC and could be easily reused to other designs, so that system on a chip comes true.

关 键 词：随机逻辑 可编程逻辑器件 数模转换 

分 类 号：TN402[电子电信—微电子学与固体电子学]