Design and Implementation of a Novel Area-Efficient Interpolator  

一种新型节省芯片面积的数字插值滤波器的设计与实现(英文)

作　　者：彭云峰[1] 孔德睿[1] 周锋[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海201203

出　　处：《Journal of Semiconductors》2006年第7期1164-1169,共6页半导体学报（英文版）

基　　金：国家自然科学基金资助项目(批准号:90307008)~~

摘　　要：This paper presents the design considerations and implementation of an area-efficient interpolator suitable for a delta-sigma D/A converter. In an effort to reduce the area and design complexity, a method for designing an FIR filter as a tapped cascaded interconnection of identical subfilters is modified. The proposed subfilter structure further minimizes the arithmetic number. Experimental results show that the proposed interpolator achieves the design specification,exhibiting high performance and hardware efficiency,and also has good noise rejection capability. The interpolation filter can be applied to a delta-sigma DAC and is fully functional.提出了一种插值滤波器的设计与实现的新方法,并最终将其实现.该方法适合于过采样数模转换器.为减小芯片面积及设计复杂度,采用一种等同子滤波器级联设计方法,并对其改进.同时,提出了一种新型的等同子滤波器实现结构,进一步减少了芯片实现所需的硬件.测试结果表明,芯片达到了设计指标,节省了芯片面积,并显示出良好的噪声抑制性能.该数字插值滤波器已经被成功应用于一款过采样数模转换器.

关 键 词：delta-sigma digital-to-analog converter INTERPOLATOR halfband filter 

分 类 号：TN713[电子电信—电路与系统]