一种低静态电流、高稳定性的LDO线性稳压器  

A Low-dropout Regulator with Low Quiescent Current and High Stability

作　　者：陈东坡[1] 何乐年[1] 严晓浪[1] 

机构地区：[1]浙江大学超大规模集成电路研究所,杭州310027

出　　处：《电子与信息学报》2006年第8期1526-1529,共4页Journal of Electronics & Information Technology

摘　　要：该文提出了一种低静态电流、高稳定性低压差(LDO)线性稳压器。LDO中的电流偏置电路产生30nA的低温度漂移偏置电流,可使LDO的静态工作电流降低到4μA。另外,通过设计一种新型的动态Miller频率补偿结构使得电路的稳定性与输出电流无关,达到了高稳定性的设计要求。芯片设计基于CSMC公司的0.5μmCMOS混合信号模型,并通过了流片验证。测试结果表明,该稳压器的线性调整和负载调整的典型值分别为2mV和14mV;输出的最大电流为300mA;其输出压差在150mA输出电流,3.3V输出电压下为170mV;输出噪声在频率从22Hz到80kHz间为150μVRMS。An unconditionally stable low-dropout regulator and low quiescent current is presented. The Low DropOut （LDO） based on a high precision CMOS current reference, which is comprised of subthreshold transistors and has small temperature coefficient, provides a low quiescent current of approximately 4μA. Furthermore, by utilizing the design method of active Miller frequency compensation, the proposed LDO＇s stability is independent of the load or the Equivalent Series Resistance （ESR） of the off-chip capacitor. The chip design is based on 0.51μm CMOS mixed-signal process of CSMC. The simulation and experimental results show that the line and load regulations are only 2mV and 14mV, respectively. The dropout voltage is only 170mV at 150mA output current when output voltage is 3.3V. The output noise is 150μ VRMs when frequency range is from 22Hz to 80 kHz.

关 键 词：低压差线性稳压器 静态电流 稳定性 线性和负载调整 

分 类 号：TN401[电子电信—微电子学与固体电子学] TN86