实时信号处理系统CPCI接口设计  

Design of CPCI Interface for Real-Time Signal Processing System

作　　者：竺红伟[1] 邢孟道[1] 夏际金[2] 

机构地区：[1]西安电子科技大学雷达信号处理国家重点实验室,陕西西安710071 [2]中国电子科技集团公司第三十八研究所,安徽合肥230031

出　　处：《雷达科学与技术》2006年第4期228-232,248,共6页Radar Science and Technology

摘　　要：新一代雷达的信号处理有实时性、通用性强的特点,该文给出了一种基于CPCI标准总线的实时信号处理系统,重点阐述了DSP和CPCI主机通信的接口设计。主机通过CPCI总线可以对DSP进行程序加载和运算结果的监测,充分利用了计算机资源。文中设计主要利用CPLD和桥接芯片PCI 9656来实现,详细说明了PCI 9656主从工作模式以及CPLD对PCI信号和局部信号的转换,最后给出了电路框图和时序仿真图。Signal processing for new generation of radar has characteristics of real-time and general purpose. This paper gives a system of real-time signal processing based on Compact PCI bus, and pays emphasis on the design of interface between the DSP and Compact PCI host. The host can up load the programs to the DSP, inspects the result of DSP, and thus fully uses the resource of computer. This design is achieved through the PCI bridge chip PCI 9656 and CPLD. The paper describes in details the master and slave modes of PCI 9656, and signal conversion between PCI bus and local bus conducted by CPLD. At last, it gives the circuit diagram and scheduling picture.

关 键 词：实时信号处理 接口设计 CPCI总线 PCI 9656芯片 

分 类 号：TN911.6[电子电信—通信与信息系统] TN957.51[电子电信—信息与通信工程]