基于XOR门的静态逻辑电路功耗优化技术  

Low Power Technology for Static Logic Circuit Based on XOR Gate

作　　者：干雪[1] 叶锡恩[1] 夏银水[1] 

机构地区：[1]宁波大学信息科学与工程学院,浙江宁波315211

出　　处：《宁波大学学报（理工版）》2006年第2期155-160,共6页Journal of Ningbo University：Natural Science and Engineering Edition

基　　金：浙江省自然科学基金(R105614);浙江省教育厅科研基金(20051732)

摘　　要：提出了一种新的基于XOR门的静态逻辑电路功耗优化技术.通过极性转换,可迅速得到基于XOR门的静态逻辑电路的最优结构,达到优化功耗的目的.实验结果表明,本文提出的算法在功耗节省方面比其他同类算法更有效.A new power-saving technique is proposed for XOR-based static circuits. Based on polarity conversion, an optimal XOR gate decomposition for static logic circuit is designed in order to minimize the power dissipation. The experimental results suggest that, in terms of power saving, the proposed algorithm is found to be more efficient than those that have so far reported in this field.

关 键 词：功耗优化技术 极性转换 Reed-Muller逻辑电路 

分 类 号：TG111.5[金属学及工艺—物理冶金]