A General Method in the Synthesis of Ternary Double Pass-Transistor Circuits  

三值双传输管电路的通用综合方法(英文)

作　　者：杭国强[1] 

机构地区：[1]浙江大学信息与电子工程学系,杭州310027

出　　处：《Journal of Semiconductors》2006年第9期1566-1571,共6页半导体学报（英文版）

基　　金：浙江省自然科学基金资助项目(批准号:Y105124)~~

摘　　要：A general method for designing ternary circuits using double pass-transistor logic is investigated. The logical relation of each MOS transistor is formulated by using the transmission operation in order to make effective and practical use of the circuits. A way to generate ternary complementary and dual circuits by applying the complementarity and duality principles is presented. This new static ternary double pass-transistor logic scheme has some favorable properties：the use of standard CMOS process without any modification of the thresholds, a perfectly symmetrical structure,a full logic swing, the maximum possible noise margins, a less complex structure, and no static power consumption. HSPICE simulations using TSMC 0.25μm CMOS technology and a 3V power supply demonstrate the effectiveness of the proposed design.提出采用双传管逻辑设计三值电路的方法,对每个MOS管的逻辑功能均采用传输运算予以表示以实现有效综合.建立了三值双传输管电路的反演法则和对偶法则.新提出的三值双传输管逻辑电路具有完全基于标准CMOS工艺,无需对MOS管作任何阈值调整,结构简单、规则,输入信号负载对称性好,逻辑摆幅完整以及无直流功耗等特点.采用TSMC0.25μm工艺参数和最高电压为3V的HSPICE模拟结果验证了所提出综合方法的正确性.

关 键 词：switching circuit theory multiple-valued logic logic synthesis double pass-transistor logic 

分 类 号：TN432[电子电信—微电子学与固体电子学]