用于CMOS图像传感器的列并行高精度ADC  

Design of a High Resolution Column ADC for CMOS Image Sensor

作　　者：张娜[1] 姚素英[1] 徐江涛[1] 

机构地区：[1]天津大学专用集成电路设计中心,天津300072

出　　处：《固体电子学研究与进展》2006年第3期349-353,共5页Research & Progress of SSE

基　　金：国家自然基金资助项目(60576025);天津市科技发展计划攻关项目(033183911)

摘　　要：设计了一种适用于CMOS图像传感器的列并行Single-slopeADC。采用的列并行ADC,同时对多数据源并行处理,增强了数据吞吐量,特别适用于CMOS图像传感器大像素阵列的数据处理。分析了影响ADC精度的因素,并给出了减小失调的方法。该ADC在0.35μm工艺下成功流片验证,测试结果表明,该ADC,在50MS/s的高数据吞吐量下,实现了CMOS图像传感器的8bit精度的设计要求和17.35mW的低功耗,以及0.62mm2的芯片面积。ADC的DNL=0.8LSB,INL=1.096LSB。A design of column parallel single-slope ADC for CMOS image sensor is presented. Proposed column ADC deals with multiple data simultaneously, which enhances data throughput and is fit for data process of large pixel array of CMOS image sensor. The factors which incluence the resolution of the ADC are analyzed, and the methods decreasing offsets are given. The ADC is successfully taped out with 0.35 μm process, the testing result shows that, the presented ADC achieves 8-bit resolution in 50 MS/s high speed, which is required by CMOS image sensor, while dissipating 9.5 mW and costing 0.62 mm^2 area. The DNL and INL of the ADC are 0.8LSB and 1. 096LSB respectively.

关 键 词：图像传感器 列并行 单斜 模数转换器 

分 类 号：TN402[电子电信—微电子学与固体电子学]