一种适用于DVB-T系统的新型FFT处理器设计  

Design of a Novel FFT Processor for DVB-T System

作　　者：周加铳[1] 陈咏恩[1] 

机构地区：[1]同济大学通信软件及专用集成电路设计中心,上海200092

出　　处：《计算机工程与应用》2006年第27期16-19,共4页Computer Engineering and Applications

基　　金：上海市应用材料研究与发展基金资助项目(编号:AM0410)

摘　　要：针对地面数字视频广播(DVB-T)系统中高速FFT处理器的设计要求,提出了一种新的基16/8混合基算法及其实现结构。采用单个基16/8复用的蝶形运算单元顺序处理,并通过减少乘法器数目,有效降低了硬件消耗;运算单元内部采用“基4+基4/2”级联流水线方式,大大加快了运算速度;此外,应用对称乒乓RAM结构提高了蝶算单元的连续运算能力;并且使用改进的块浮点防溢出机制,以保证运算精度。仿真和实现结果表明该设计具有良好的性能,完全满足实际应用要求。A novel mixed radix-16/8 FFT algorithm and architecture are presented suitable for terrestrial digital video broadcasting （DVB-T） system.By using a single radix-16/8 butterfly processing element and reducing the number of multipliers,the proposed approach obtains significant hardware reduction.To achieve high speed processing,the ＂radix-4 ＋ radix-4/2＂ cascade pipeline architecture is designed in radix-16/8 butterfly unit.Furthermore,a symmetry ping-pang RAM structure is adopted to increase the continuous computing capability of the butterfly core.Computing precision is also enhanced through a modified block floating point anti-overflow scheme.Simulation and hardware implementation results show that the proposed method performs well and can meet the needs of the given application.

关 键 词：快速傅立叶变换 蝶形运算单元 流水线 对称乒乓RAM结构 防溢出 

分 类 号：TN911.72[电子电信—通信与信息系统]