单芯片多处理器结构功耗评估方法研究  

Research on CMP power estimation model

作　　者：赵新源[1] 郭松柳[1] 汪东升[1] 

机构地区：[1]清华大学计算机科学与技术系,北京100084

出　　处：《计算机工程与设计》2006年第18期3311-3313,共3页Computer Engineering and Design

基　　金：国家863高技术研究发展计划基金项目(2002AA1Z1030)。

摘　　要：单芯片多处理器(CMP)结构已成为提高微处理器性能的重要途径,但国内外针对此结构的功耗评估与优化研究还较少见到,已有的研究多集中在软件级和编译级,目前还没有适用于该结构的功耗评估软件模拟器。为单芯片多处理器结构建立准确的功耗评估模型,将可给出该结构中各部件的功耗使用情况,进而可通过调整部件电压或优化部件结构达到减少整体功耗的目的;同时,此功耗评估模型也可作为高层功耗优化研究的测试平台,为系统级、软件级功耗优化研究提供支持。Chip multiprocessor （CMP） structure has become an important way to improve performance of microprocessors. However, research on power estimation and optimization of CMP structure is still scarce. Current research has mainly concentrated on software level and compiling level power optimization. There is no software power estimation model for CMP structure till now. The accurate power estimation model designed for CMP structure analyze the power consumption of each component in CMP, so that efforts are made to reduce power consumption of some certain components; What is more, this power model is utilized as a testing platform for system level and software level power estimation research.

关 键 词：单芯片多处理器 功耗评估模型 CPU模拟器 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]