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作 者:Li Haoliang He Lenian Wang Zi Yan Xiaolang
机构地区:[1]Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China
出 处:《Journal of Electronics(China)》2006年第5期736-740,共5页电子科学学刊(英文版)
摘 要:The paper proposes a novel transceiver in physical layer for high-speed serial data link based upon Universal Serial Bus (USB) 2.0, comprising transmitter and receiver. In the design, transmitter contains pre-and-main driver to satisfy slew rate of output data, receiver includes optimized topology to improve preci- sion of received data. The circuit simulation is based on Cadence’s spectre software and Taiwan Semiconduc- tor Manufacture Corporation’s library of 0.25μm mixed-signal Complementary Metal-Oxide Semiconductor (CMOS) model. The front and post-simulation results reveal that the transceiver designed can transmit and re- ceive high-speed data in 480Mbps, which is in agreement with USB2.0 specification. The chip of physi- cal-layer transceiver has been designed and implemented with 0.25μm standard CMOS technology.The paper proposes a novel transceiver in physical layer for high-speed serial data link based upon Universal Serial Bus (USB) 2.0, comprising transmitter and receiver. In the design, transmitter contains pre-and-main driver to satisfy slew rate of output data, receiver includes optimized topology to improve precision of received data. The circuit simulation is based on Cadence's spectre software and Taiwan Semiconductor Manufacture Corporation's library of 0.25μm mixed-signal Complementary Metal-Oxide Semiconductor (CMOS) model. The front and post-simulation results reveal that the transceiver designed can transmit and receive high-speed data in 480Mbps, which is in agreement with USB2.0 specification. The chip of physical-layer transceiver has been designed and implemented with 0.25μm standard CMOS technology.
关 键 词:Complementary Metal-Oxide Semiconductor(CMOS) transceiver Physical layer High-speed Universal Serial Bus (USB) 2.0
分 类 号:TP3[自动化与计算机技术—计算机科学与技术]
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