A DESIGN OF 0.25μm CMOS SWITCH  

作　　者：Han Lei Yang Tao Xie Jun Wang Yong You Yu Zhang Bo 

机构地区：[1]Chengdu G oldtel Microelectronics Co., Ltd, Chengdu 611731, China [2]School of Microelectronics and Solid-State Electronics, University of Electronic Science ＆ Technology of China, Chengdu 610054, China

出　　处：《Journal of Electronics(China)》2006年第5期745-747,共3页电子科学学刊（英文版）

基　　金：Partially supported by the National Natural Science Foundation of China (No.60501012).

摘　　要：Single-Pole Double-Throw （SPDT） broadband switch has been designed in a 0.25gm Complementary Metal Oxide Semiconductor （CMOS） process. To optimize the performance of isolation and insertion loss, based on normal design, the effects of Gate Series Resistances （GSR） on insertion loss and switching time are analyzed for the first time. The compatible GSRs are chosen by the analyses. The fabricated chips were tested and the results show the switch isolation from DC （Direct Current） to 1GHz exhibits 55dB and insertion loss lower than 2.1 dB.Single-Pole Double-Throw (SPDT) broadband switch has been designed in a 0.25μm Comple- mentary Metal Oxide Semiconductor (CMOS) process. To optimize the performance of isolation and insertion loss, based on normal design, the effects of Gate Series Resistances (GSR) on insertion loss and switching time are analyzed for the first time. The compatible GSRs are chosen by the analyses. The fabricated chips were tested and the results show the switch isolation from DC (Direct Current) to 1GHz exhibits 55dB and insertion loss lower than 2.1dB.

关 键 词：RF （Radio-Frequency） CMOS （Complementary Metal Oxide Semiconductor） SWITCH Insertion loss Gate Series Resistance （GSR） Switch time 

分 类 号：TN1[电子电信—物理电子学]