Low-Complexity Bit-Parallel Multiplier over GF（2^m） Using Dual Basis Representation  

作　　者：李秋莹 洪振雄 周义昌 

机构地区：[1]Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology Taoyuan County 333 [2]Dcpartment of Computer and Communication Engineering, National Kaohsiung First University of Science and Technology Kaohsiung

出　　处：《Journal of Computer Science & Technology》2006年第6期887-892,共6页计算机科学技术学报（英文版）

摘　　要：Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF（2^m） using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is presented, The architecture is optimized in order to minimize the silicon covered area （transistor count）. The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF（2^m）.Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF（2^m） using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is presented, The architecture is optimized in order to minimize the silicon covered area （transistor count）. The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF（2^m）.

关 键 词：bit-parallel systolic multiplier inner product dual basis Galois field GF（2^m） 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]