工艺参数变动下的三维互连电容快速模式建库方法  

Fast Library-Building Method for 3D Capacitance Extraction with Variation of Process Parameters

作　　者：张雷[1] 王习仁[1] 喻文健[1] 王泽毅[1] 

机构地区：[1]清华大学计算机科学与技术系,北京100084

出　　处：《计算机辅助设计与图形学学报》2006年第12期1837-1843,共7页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家自然科学基金(90407004);国家"八六三"高技术研究发展计划(2004AA1Z1050)

摘　　要：针对工艺不稳定性所带来的三维互连电容模式提取耗时激增的问题,提出一种增量式快速模式建库方法·该方法基于直接边界元计算,在2个紧邻工艺变动组合计算中,仅对前一组合计算所得的系数矩阵与右端项作局部修改,并取经预测修正的结果作为初值迭代提取后一工艺变动组合的电容,有着很高的精度和较高的加速比·To solve the large time-consuming problem induced by the instability of process in 3D interconnect capacitance extraction, we present an incremental library-building method. Based on the direct boundary element method, this method can re-utilize the previous computation results. In a series of adjacent variation parameter combinations, we just modify a small portion of the coefficients matrix and right hand side of previous combination, and use the previous solution after predictive modification as the iterative initial value of the latter combination＇s linear system to extract the capacitance. This method can achieve high precision and good acceleration.

关 键 词：VLSI 三维电容提取 工艺参数变动 直接边界元法 模式 建库 

分 类 号：TN47[电子电信—微电子学与固体电子学]