一种多层次数字电路仿真算法  

An Algorithm for Hierarchical Simulation of Digital Circuits

作　　者：何国良[1] 李元香[1] 涂航[1] 戴志锋[1] 

机构地区：[1]武汉大学计算机学院,武汉市珞喻路129号430079

出　　处：《武汉大学学报（信息科学版）》2006年第12期1120-1123,共4页Geomatics and Information Science of Wuhan University

基　　金：国家自然科学基金资助项目(60442001);国家863计划资助项目(2002AA1Z1490)

摘　　要：根据数字电路的拓扑结构,提出了一种多阶段的仿真算法。实验表明,本算法能较好地满足演化硬件系统平台对个体电路进行适应度评估的要求。On the basis of the topology of digital circuits, a hierarchical algorithm for circuit simulation is proposed. The main idea is dividing the simulation process into two phases. In the first phase, a logic circuit is structurized and each macroblock is set to the state of either activation or suspension according to the input values of this circuit at the current time. In the second phase, all nodes in each activated macroblock are firstly ordered with breadth-first search pattern. Then all nodes in the macroblock are simulated in reverse order until the output value of the macroblock is obtained.

关 键 词：电路仿真 演化硬件 并行离散事件仿真 

分 类 号：TP338[自动化与计算机技术—计算机系统结构] TP391[自动化与计算机技术—计算机科学与技术]