一种高频真对数放大器的设计  

Design of a high frequency true logarithmic amplifier

作　　者：唐丽均[1] 周熙[1] 易文翠[1] 

机构地区：[1]重庆通信学院网络与嵌入式系统实验室,重庆400035

出　　处：《重庆邮电学院学报（自然科学版）》2006年第6期683-685,共3页Journal of Chongqing University of Posts and Telecommunications(Natural Sciences Edition)

基　　金：重庆市自然科学基金资助(CSTC;2005BB2209)

摘　　要：高频真对数放大器设计采用直流耦合放大器,运用4条增益路径的并联求和结构,提供了分段逼近的对数响应,有工作频率高、动态范围大、对数误差小等良好的性能,能很好地减少线路噪声。The design of a high frequency true logarithmic amplifier adopts a DC coupling amplifier; it uses a parallel summation architecture with four gain paths and provides a piecewise approximate logarithmic response. It has some good performance, such as high frequency, wide dynamic range and less logarithmic response error, which can decrease the linear noise.

关 键 词：真对数放大器 并联求和 对数响应 

分 类 号：TN722.58[电子电信—电路与系统]