一种流水线结构A/D转换器的速度分析方法  

A Speed Analysis Methodology for Pipelined A/D Converters

作　　者：王红梅[1] 李福乐[2] 李冬梅[1] 王志华[2] 

机构地区：[1]清华大学电子工程系,北京海淀区100084 [2]清华大学微电子学研究所,北京海淀区100084

出　　处：《电子科技大学学报》2006年第6期913-916,共4页Journal of University of Electronic Science and Technology of China

基　　金：国家863计划资助项目(2002AA1Z1720);国家973资助项目(G2000036508)

摘　　要：提出了一种开关电容流水线结构A/D转换器(ADC)的速度分析方法。流水线结构ADC的速度取决于其级电路中开关电容反馈放大器的建立速度。根据流水线结构的特点,推导出输入等效阶跃电压的计算公式。将建立过程划分为大信号和小信号工作区,分别用不同的跨导运放(OTA)模型进行分析,得出了OTA指标、采样电容值等电路参数与建立时间之间的关系式。通过对一个10bit流水线结构ADC的MATLAB进行仿真,验证了所提出的分析方法和得到的关系式的有效性。A speed analysis methodology for a switched-capacitor pipelined A/D converter is presented. The conversion speed of a pipelined A/D converter is determined by the settling speed of the switched-capacitor feedback amplifier in the conversion stage. According to the principle of the pipelined architecture, the formula of the equivalent input step voltage seen at the input nodes of the op-amp is obtained. Then by dividing the settling phase into the large-signal and small-signal mode and using different op-amp model in the different mode, the expression which shows the relationship between the settling time and circuit parameters such as the value of sampling capacitors or op-amp specifications is obtained. Finally, the proposed methodology and the obtained expression are verified by the MATLAB simulation on a 10-bit pipelined ADC.

关 键 词：模数转换器 流水线 开关电容 建立时间 

分 类 号：TN431[电子电信—微电子学与固体电子学]