高速PCB设计中GHz串行信号的完整性分析与仿真  

Analysis and Simulation on Integrity of GHz Serial Signal in High-Speed PCB Design

作　　者：吕平[1] 杜晓宁[2] 兰巨龙[1] 

机构地区：[1]信息工程大学信息工程学院,河南郑州450002 [2]信息工程大学政治部,河南郑州450002

出　　处：《信息工程大学学报》2006年第4期364-367,共4页Journal of Information Engineering University

基　　金：国家863计划资助项目(2003AA103510)

摘　　要：文章针对信号频率超过GHz的高速串行信号带来的新的信号完整性问题,如:趋肤效应、介质损耗、码间串扰等进行了详细的分析;研究了这些信号完整性问题对于SI仿真的影响;给出解决GHz信号完整性问题的方案,并验证了方案的有效性。The new problems about signal integrity such as terfacc brought by high-speed serial signal whose frequency skin effect, dielectric loss is of the order of GHz are and inter-symbol inanalyzed in detail in this paper, the effect of this problems about signal integrity on SI simulation is given, a method for solving the problems about GHz signal integrity is presented, and its effectivity is validated with reference to an example.

关 键 词：串行器/解串器 信号完整性 损耗 预加重 眼图 

分 类 号：TN929.11[电子电信—通信与信息系统]