Macroblock-level decoding and deblocking method and its pipeline implementation in H.264 decoder SOC design  被引量:1

Macroblock-level decoding and deblocking method and its pipeline implementation in H.264 decoder SOC design

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作  者:WANG Shu-hui LIN Tao LIN Zheng-hui 

机构地区:[1]Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai 200030, China

出  处:《Journal of Zhejiang University-Science A(Applied Physics & Engineering)》2007年第1期36-41,共6页浙江大学学报(英文版)A辑(应用物理与工程)

基  金:Project (No. 2002AA1Z1190) supported by the National Hi-Tech Research and Development Program (863) of China

摘  要:This paper presents a macroblock-level (MB-level) decoding and deblocking method for supporting the flexible macroblock ordering (FMO) and arbitrary slice ordering (ASO) bit streams in H.264 decoder and its SOC/ASIC implementation. By searching the slice containing the current macroblock in the bit stream and switching slices correctly, MBs can be decoded in the raster scan order, while the decoding process can immediately begin as long as the slice containing the current MB is available. This architectural modification enables the MB-level decoding and deblocking 3-stage pipeline, and saves about 20% of SDRAM bandwidth. Implementation results showed that the design achieves real-time decoding of 1080HD (1920×1088@30 fps) at a system clock of 166 MHz.This paper presents a macroblock-level (MB-level) decoding and deblocking method for supporting the flexible macroblock ordering (FMO) and arbitrary slice ordering (ASO) bit streams in H.264 decoder and its SOC/ASIC implementation. By searching the slice containing the current macroblock in the bit stream and switching slices correctly, MBs can be decoded in the raster scan order, while the decoding process can immediately begin as long as the slice containing the current MB is available. This architectural modification enables the MB-level decoding and deblocking 3-stage pipeline, and saves about 20% of SDRAM bandwidth. Implementation results showed that the design achieves real-time decoding of 1080HD (1920× 1088@30 fps) at a system clock of 166 MHz.

关 键 词:Flexible macroblock ordering (FMO) Arbitrary slice ordering (ASO) System-on-chip (SOC) Raster scan order PIPELINE 

分 类 号:TN919.81[电子电信—通信与信息系统]

 

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