基于NiosII的SoPC系统在时统系统中的应用开发  

SoPC System Application Development in Timing System Based on NiosII

作　　者：吕桂华[1] 刘锋[1] 李和战[1] 龚光林[1] 何海英[1] 田小平[1] 

机构地区：[1]北京跟踪与通信技术研究所,北京100094

出　　处：《飞行器测控学报》2006年第6期86-90,共5页Journal of Spacecraft TT&C Technology

摘　　要：NiosII处理器是一种用户可随时配置和构建的32位指令集和数据通道的嵌入式系统微处理器IP核，与传统的8／16位系统相比，无论处理器的结构还是开发手段上都发生了较大变化。本文主要介绍了NiosII的性能特点和基于NiosII的SoPC系统的功能构架，给出了基于NiosII处理器的SoPC系统在时统系统中的一种应用方案。其中重点介绍了该方案的SoPC系统设计实现和软件设计实现。NiesII processor is an embedded system microprocessor IP kernel with 32 bits instruction set and data channel, which can be created and contlgurated according to the design requirements. Compared with traditional 8/16 bits systems, NiesII processor is different from them in architecture and development method. This paper introduces NiosII processor＇s features and the function architecture of SoPC system based on NiesII processor, and provides an SoPC system application plan in timing system, putting the emphasis on the SoPC system design and the software design of the application plan.

关 键 词：NIOSII处理器 SOPC系统 FPGA 时统系统 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]