基于FPGA的DDS和周期合成技术在EIS中的应用  

The Application of Direct Digital Frequency Synthesizer and Periods Synthesizer Based on FPGA in EIS

作　　者：陈冬云[1] 韩林华[1] 朱为[1] 史小军[1] 

机构地区：[1]东南大学电子科学与工程学院,江苏省南京市210096

出　　处：《电子工程师》2007年第2期35-37,62,共4页Electronic Engineer

摘　　要：生物电阻抗扫描成像技术在妇女乳腺癌早期检查中要求采用高精度、多频率、相位可控的正弦激励源信号,输入到人体组织,通过检测响应信号来获取癌变组织的生理和病理信息。介绍了EIS(电阻抗扫描)的基本概念,重点介绍利用FPGA(现场可编程门阵列)实现DDS(直接数字频率合成)的原理;同时结合周期合成技术完成对激励信号和响应信号的采样,以满足EIS中成像需要,并给出了关键性Verilog代码。采用该方法设计的EIS激励源可以很容易地嵌入到EIS控制系统中,而不用专用DDS芯片,具有高性能、高性价比、电路结构简单等特点。High precision, muhifrequency and phase-locked sine stimulator is needed when using Electrical Impedance Seanning（EIS） in breast examinations. We drive the sine signal into the body and sample the response signals in order to investigate the speciality and characteristic of carcinoma in breast. The fundamental principle of DDS based on FPGA is introduced in this paper, and sampling the stimulator and response signals by using the Periods Synthesizer technology is also introduced . The application of Periods Synthesizer technology in sampling is the highlight of this paper. The design of DDS and Periods Synthesizer technology possesses some characteristics including high performance, high performance-cost ratio and simple circuit structure, and so on. These technologies can be easily embedded into the control system of EIS.

关 键 词：直接数字频率合成 周期合成 EIS 

分 类 号：TN741[电子电信—电路与系统]