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作 者:周竹瑾[1] 李志升[1] 李宁[1] 李巍[1] 任俊彦[1]
机构地区:[1]复旦大学ASIC国家重点实验室,上海201203
出 处:《Journal of Semiconductors》2007年第3期372-376,共5页半导体学报(英文版)
摘 要:This paper describes a complete baseband chain for both GSM and WCDMA receivers with a SMIC 0.35μm mixed signal process. The chain consists of a dual-mode,highly linear, fourth order Chebyshev active RC filter and three VGA stages. The filter is designed to meet the bandwidth specifications of the GSM and WCDMA standards and share the maximum number of components between the two modes to reduce manufacturing cost. The design is free of DC-offset and has an inter-stage high-pass filter, and operational amplifiers with adjustable GBW are used to minimize GSM-mode power consumption. The measured noise figures are 27. 3 and 42dBm in WCDMA and GSM modes,respectively, at the maximum gain. The IIP3 is 40dBm at unit gain in the WCDMA mode,and the circuit consumes 47.0mW. The IIP3 is 28dBm in the GSM mode,and the circuit consumes 31.8mW. The supply voltage is 3.3V.采用SMIC0.35μmCMOS混合信号工艺,实现了同时适用于GSM/WCDMA的完整的基带.基带由双模的高线性度的四阶切比雪夫形式的有源RC低通滤波器以及三级可变增益放大器构成.滤波器的设计同时满足GSM和WCDMA的带宽性能并且为降低制造成本在两种模式下具有最大的元件共享度.基带由于插入了高通滤波器具有滤除直流的功能,并且为了优化GSM模式下的功耗,运放的带宽做成可调.在最大增益情况下测得的噪声系数在GSM和WCDMA模式下分别为42和27.3dBm.在单位增益的情况下,WCDMA模式下的IIP3为40dBm,功耗为47.0mW;在GSM模式下,IIP3为28dBm,功耗为31.8mW.电源电压为3.3V.
关 键 词:active RC filter VGA Tow-Thomas DC-offset correction DUAL-MODE
分 类 号:TN713[电子电信—电路与系统] TN722
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