A Novel Power Optimization Method by Minimum Comparator Number Algorithm for Pipeline ADCs  

作　　者：宁宁 吴霜毅 王向展 杨谟华 

机构地区：[1]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

出　　处：《Journal of Electronic Science and Technology of China》2007年第1期75-80,共6页中国电子科技（英文版）

基　　金：Supported by the National Natural Science Foundation of China (No. 60072004)

摘　　要：The effects of stage numbers on power dissipation of pipeline analog-to-digital converter （ADC） are studied and a novel design method aiming for power optimization is presented. In this method, a minimum comparator number algorithm （MCNA） is first introduced, and then the optimum distribution of resolutions through pipeline ADC stages is deduced by MCNA. Based on the optimum stage-resolution distribution, an optimization method is established, which examines the precise function between ADC power and stage resolutions with a parameter of power ratio （Rp）. For 10-bit pipeline ADC with scaling down technology, the simulation results by using MATLAB CAD tools show that an eight-stage topology with 1-bit RSD correction achieves the power optimization indicated by the power reduction ratio.The effects of stage numbers on power dissipation of pipeline analog-to-digital converter （ADC） are studied and a novel design method aiming for power optimization is presented. In this method, a minimum comparator number algorithm （MCNA） is first introduced, and then the optimum distribution of resolutions through pipeline ADC stages is deduced by MCNA. Based on the optimum stage-resolution distribution, an optimization method is established, which examines the precise function between ADC power and stage resolutions with a parameter of power ratio （Rp）. For 10-bit pipeline ADC with scaling down technology, the simulation results by using MATLAB CAD tools show that an eight-stage topology with 1-bit RSD correction achieves the power optimization indicated by the power reduction ratio.

关 键 词：minimum comparator number algorithm pipeline analog-to-digital converter  power dissipation scaling down stage resolution 

分 类 号：TN792[电子电信—电路与系统]