FAULT DETECTION TEST SET FOR TESTABLE REALIZATIONS OF LOGIC FUNCTIONS WITH ESOP EXPRESSIONS  

作　　者：Pan Zhongliang Chen Guangju 

机构地区：[1]School of Physics and Telecommunication Engineering, South China Normal University, Guangzhou 510631, China [2]Institute of Automation Engineering, University of Electronic Science and Technology of China Chengdu 610054, China

出　　处：《Journal of Electronics(China)》2007年第2期238-244,共7页电子科学学刊（英文版）

基　　金：Supported by the National Natural Science Foundation of China (No.60006002);the Education Department of Guangdong Province of China (No.02019).

摘　　要：The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n ＋ m ＋ 1 vectors for the detections of AND bridging faults and a test set with 2n ＋ m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using ）（OR gate tree, a test set with 2n ＋ m vectors for the detections of AND bridging faults and a test set with 3n ＋ m ＋ 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n ＋ 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function.The circuit testable realization and its fault detection for logic functions with ESOP (EXOR-Sum-Of-Products) expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2 n + m+ 1vectors for the detections of AND bridging faults and a test set with 2n + mvectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using XOR gate tree, a test set with 2n + mvectors for the detections of AND bridging faults and a test set with 3n + m+ 1vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n + 5vectors for the XOR gate tree realization is pre- sented. Where n is the number of input variables and m is the number of product terms in a logic function.

关 键 词：Logic functions Testable realization Fault detection Single faults Bridging faults 

分 类 号：TN407[电子电信—微电子学与固体电子学]