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作 者:常昌远[1] 姚建楠[1] 邹一照[1] 谭春玲[1] 魏同立[1]
出 处:《通信电源技术》2007年第2期46-48,共3页Telecom Power Technology
摘 要:设计了一种降压式PWM/PFM自动切换的同步整流DC—DC变换器芯片,对其结构原理进行了分析,并用0.5μmn阱CMOS工艺进行模拟验证。Hspice模拟结果表明在输出负载电流为1mA,输入电源电压为3.6V,温度为25C时,纹波电压为10mV,静态电流只有56.7μA,而待机工作模式下静态电流小于0.01μA,效率高达90%。体现其具有低功耗、低纹波、高效率的优点,且该变换器可工作在2~6V电源电压范围,可应用于各种便携式电子产品中。The paper proposed a synchronous step- down DC-DC converter with PWM/PFM switching control. The structure and principles were analyzed and simulated by using 0. 5μm n-well CMOS process. The Hspice simulation results show that the typical ripple voltage is 10mV, and the typical quiescent current is only 56. 7 μA, but quiescent current is less than 0. 01 μA in standby mode, efficiency achieves up to 90% at lmA when power supply is 3. 6 V and temperature is 25 ℃, which imply it has an advantage of low power dissipation, low ripple voltage and high efficiency. The converter has a wide range of power supply from 2 V to 6 V, and it can be used for portable electronics.
关 键 词:DC—DC变换器 PWM/PFM自动切换 同步整流 高效率
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