TM1300 DSP芯片JTAG接口仿真器的设计  

A design of TM1300 DSP chip JTAG interface simulator

作　　者：王超[1] 李智明[2] 

机构地区：[1]安徽机电职业技术学院电气工程系,安徽芜湖241000 [2]南通纺织职业技术学院机电工程系,江苏南通226007

出　　处：《宁夏工程技术》2007年第1期88-90,共3页Ningxia Engineering Technology

摘　　要：采用TM1300的测试访问端口控制器TAP中的Test DataIn,Test Data Out,Test Clock和Test Mode Select4个信号管脚,通过CPLD和电平匹配,实现了与PC机增强型并口协议并口的硬件连接.在分析JTAG接口的工作过程和时序的基础上,编写出基于CPLD的JTAG仿真器相应的驱动程序,实现了PC的并行口与TM1300的数据通信.该方法的可靠性、稳定性和经济性在实际系统中得到了充分的验证,对缩短产品的研发和调试周期,具有实际意义.Adopting the four pins of TAP： Test Data In, Test Data Out, Test Clock, Test Mode Select of TM1300 and the experiment realized the hardware connection with EPP of PC through CPLD, electric level match. Then on the basis of analysis of working process and time order of JTAG interface, the drive program corresponding to JTAG based on CPLD was compiled and the goal of the data communication between PC EPP and TM1300 was achieved. This design makes use of the simulator JTAG based on CPLD, whose credibility, stability and economy win full verification in real system, and it is significant in shortening the period of research and development and adjustment.

关 键 词：EPP(增强型并口协议) TM1300仿真器 JTAG(联合测试行为组织接口) CPLD 

分 类 号：TP337[自动化与计算机技术—计算机系统结构]