可编程FFT阵列处理器  

A Programable FFT Array Processor

作　　者：阎鸣生 茅于海[1] 

机构地区：[1]清华大学无线电系

出　　处：《电子学报》1989年第4期12-18,共7页Acta Electronica Sinica

摘　　要：本文提出了一种高度可编程的FFT阵列处理器、其阵列单元为2~s,处理的点数为2~r。采用4个单元的FFT阵列处理器可以使1024点的复数FFT(或IFFT)在519μS内完成。采用块浮点、12位字长的四单元FFT和四单元IFFT的阵列处理器已采用位片技术硬件实现,并用于雷达信号的实时处理。A highly programable digital FFT array processor has been proposed in this paper. The number of unit is M = 2S, and the transform length is N = 2r. The 1024 points complex FFT (or IFFT)could be calculated in 519 μs by 4 units array FFT processor.The architecture roposed in the paper can solve the problems of communications between the arithmetic unit, and the generations of the address of data and coefficients. The hardware of 4 units processor of FFT and IFFT has been implemented and be using in real time radar signal processing.

关 键 词：阵列处理器 FFT 可编程 

分 类 号：TN911.7[电子电信—通信与信息系统]