32位CISC微处理器流水线的设计  

Design of the Pipeline for 32-bit CISC Microprocessor

作　　者：曹学飞[1] 张盛兵[1] 张骏[1] 

机构地区：[1]西北工业大学航空微电子中心,陕西西安710065

出　　处：《微电子学与计算机》2007年第4期186-189,共4页Microelectronics & Computer

基　　金：国家自然科学基金项目(60573107)

摘　　要：介绍一款全正向自主设计的32位CISC结构微处理器龙腾C2中的流水线设计,该处理器与Intel486DX4指令集兼容。针对CISC结构微处理器流水线设计的难点,采用了微指令流水执行等技术,设计了龙腾C2的7级流水线结构。分析了影响流水线正常执行的各种因素,设计了流水线相关处理机制和精确中断实现机制,实现了一个具有较高性能的CISC微处理器的流水线。仿真和综合的结果表明,该流水线的设计满足龙腾C2微处理器的功能和性能要求。This paper presents the design of the pipeline for 32-bit CISC microprocessor＂LongtiumC2＂, which is designed by top-down methodology. The microprocessor is compatible with Intel 486DX4 instruction set.The architecture of ＂LongtiumC2＂and the function of each part in the microprocessor are described briefly in the paper. Aiming at the difficulty in the pipeline designing for CISC microprocessor, ＂LongtiumC2＂ adopts seven-stage pipeline using the technology of micro-instruction pipelining.Besides, the paper analyzes the reasons that influence the pipeline and the control mechanism in practice design, such as dependency processing and precise interruption, so we accomplish a high performance pipeline for CISC microprocessor, the result of verification and synthesis shows that this pipeline could achieve the function and performance of ＂LongtiumC2＂ microprocessor.

关 键 词：微处理器 流水线 CISC 数据相关 

分 类 号：TP32[自动化与计算机技术—计算机系统结构]