PWM电源管理芯片的全定制版图设计  

Full-custom layout design of a PWM power management IC

作　　者：张川[1] 郎君[1] 朱莹[1] 何书专[1] 杨盛光[1] 

机构地区：[1]南京大学物理系,南京210093

出　　处：《电子测量技术》2007年第3期137-139,共3页Electronic Measurement Technology

摘　　要：本文采用0.6μm CMOS2P2M工艺,完成了脉宽调制器PWM电源管理芯片的全定制版图设计。该芯片为混合信号IC,从引线驱动布局与模块驱动布局两方面考虑版图布局。版图设计过程中参考了一些经典的规则,还根据芯片本身特征作了具体的考虑。版图设计通过DRC与LVS检查,并在此基础上完成了电路后仿真。后仿真结果显示:芯片能按设计预期在2ms内启动并正常工作,具有稳定的3.3V输出电压,版图设计较好地实现了电路功能。最终版图大小为1450μm×970μm。The full-custom layout design of a PWM power management IC has been implemented with 0. 6 um CMOS 2P2M process. The chip is a mixed--signal IC. The floor-planning design is put forward by considering pin-driven planning and block-driven planning. During layout design, some classical rules are referred, also the particularity of the IC has been thought about. After finishing the DRC and LVS checks, the circuit post--simulation is completed. The post-simulation shows that the IC can set up in 2 ms and work normally, having steady output voltage of 3. 3 V, the layout design has realized the function of circuits. The final layout area is 1 450 um× 970 um.

关 键 词：PWM电源管理芯片 版图设计 平面布局 静电放电 

分 类 号：TN35[电子电信—物理电子学]