Degradation characteristics and mechanism of PMOSFETs under NBT-PBT-NBT stress  

作　　者：刘红侠 李忠贺 郝跃 

机构地区：[1]Key Lab of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi'an 710071, China

出　　处：《Chinese Physics B》2007年第5期1445-1449,共5页中国物理B（英文版）

基　　金：Project supported by the National Natural Science Foundation of China （Grant No 60206006）, the Program for New Century Excellent Talents of Ministry of Education of China （Grant No 681231366）, the National Defense Pre-Research Foundation of China （Grant No 51308040103） and the Key Project of Chinese Ministry of Education （Grant No 104172）.

摘　　要：Degradation characteristics of PMOSFETs under negative bias temperature-positive bias temperature-negative bias temperature （NBT-PBT-NBT） stress conditions are investigated in this paper. It is found that for all device parameters, the threshold voltage has the largest shift under the first NBT stress condition. When the polarity of gate voltage is changed to positive, the shift of device parameters can be greatly recovered. However, this recovery is unstable. The more severe degradation appears soon after reapplication of NBT stress condition. The second NBT stress causes in linear drain current to degrade greatly, which is different from that of the first NBT stress. This more severe parameter shift results from the wear out of silicon substrate and oxide interface during the first NBT and PBT stress due to carrier trapping/detrapping and hydrogen related species diffusion.Degradation characteristics of PMOSFETs under negative bias temperature-positive bias temperature-negative bias temperature （NBT-PBT-NBT） stress conditions are investigated in this paper. It is found that for all device parameters, the threshold voltage has the largest shift under the first NBT stress condition. When the polarity of gate voltage is changed to positive, the shift of device parameters can be greatly recovered. However, this recovery is unstable. The more severe degradation appears soon after reapplication of NBT stress condition. The second NBT stress causes in linear drain current to degrade greatly, which is different from that of the first NBT stress. This more severe parameter shift results from the wear out of silicon substrate and oxide interface during the first NBT and PBT stress due to carrier trapping/detrapping and hydrogen related species diffusion.

关 键 词：ultra deep submicron PMOSFETs negative bias temperature instability （NBTI） positive bias temperature instability （PBTI） interface traps 

分 类 号：TN432[电子电信—微电子学与固体电子学]