Sensitivity Design for a CMOS Optoelectronic Integrated Circuit Receiver  

高灵敏度CMOS光电集成接收机设计(英文)

作　　者：朱浩波[1] 毛陆虹[1] 余长亮[1] 马利远[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《Journal of Semiconductors》2007年第5期676-680,共5页半导体学报（英文版）

基　　金：国家自然科学基金(批准号:60536030,60676038);天津市基础研究重点项目(批准号:06YFJZJC00200)资助项目~~

摘　　要：A sensitivity design method for a CMOS optoelectronic integrated circuit （OEIC） receiver is reported. The receiver consists of a regulated cascade （RGC） transimpedance amplifier （TIA） and a double photodiode （DPD） detector. The noise and sensitivity of the receiver are analyzed in detail. The noise mainly comes from the thermal noise of resistors and the flicker noise of MOSFETs. The relationship between noise and receiver sensitivity is presented. The sensitivity design method for the receiver is given by a set of equations. The OEIC receiver was implemented in a CSMC 0.6μm standard CMOS process. The measured eye diagram shows that the CMOS OEIC receiver is able to work at bit rates of up to 1.25GB/s and the sensitivity is - 12dBm.设计了一个由调节型级联跨阻抗放大器(TIA)和双光电二极管(DPD)构成的CMOS光电集成(OEIC)接收机.具体分析了这个光电集成接收机的噪声和灵敏度及其相互关系.接收机中的噪声主要是电路中电阻的热噪声和MOS器件的闪烁噪声.提出了优化接收机灵敏度的方法.通过低成本的CSMC0·6μm CMOS工艺流片并对芯片进行了测试.从测试眼图可知,该CMOS光电集成接收机可工作在1.25GB/s的传输速率下,灵敏度为-12dBm.

关 键 词：CMOS OEIC RECEIVER sensitivity noise 

分 类 号：TN851[电子电信—信息与通信工程]