基于自由二元判决图转换的可测性优化方法  

Testability Optimization Based on Free Binary Decision Diagram Transformation

作　　者：章小兵[1] 王勇[1] 陈光[1] 

机构地区：[1]电子科技大学CAT研究室

出　　处：《电子科技大学学报》1997年第2期171-174,共4页Journal of University of Electronic Science and Technology of China

基　　金：国家"八五"重点科研项目

摘　　要：提出了一种基于自由二元判决图转换的可测性优化方法。该方法首先将电路转化为ＦＢ－ＤＤ表达形式，然后用切换单元来替换ＦＢＤＤ中的节点，以形成易测的多级网络，再通过冗余的认定和消除来达到可测性逻辑优化的目的。与以前的可测性设计方法相比，这种方法适用于任意电路，特别是规模较大。This paper presents a testability optimization method based on free binary decision diagram transformation.In this method,circuit is first converted to FBDD representation,then converted to easily testable multi level network by replacing BDD nodes with multiplexors,and finally converted to testable circuit by redundancy removal.The methods advantage over the classical ones is that it is suitable for almost arbitrary circuits,especially very large scale circuits that can not be represented by two level logic.

关 键 词：可测性 优化 冗余消除 自由二元判决图 

分 类 号：TN710.07[电子电信—电路与系统]