一种改进Turbo码分量译码器的FPGA实现  

implementation of a kind of improved sub-decoder of turbo on FPGA

作　　者：赵旦峰[1] 罗清华 雷李云[1] 

机构地区：[1]哈尔滨工程大学信息与通信工程学院,黑龙江哈尔滨150001

出　　处：《应用科技》2007年第6期8-11,共4页Applied Science and Technology

基　　金：黑龙江省自然科学基金资助项目(F200503)

摘　　要：介绍了Turbo码的译码方法和译码步骤,提出一种改进的译码步骤和相应的分量译码FPGA(现场可编程门阵列)实现方案.仿真表明,该方案能有效地降低译码的复杂度和译码延时,达到了较好的性能,具有较高的实用价值.This paper gives a brief introduction to decoding means and procedure of Turbo code . Then, an improved decoding procedure and a corresponding scheme are proposed to realize the component decoding of FPGA. Simulation suggests that this scheme effectively decreases the complexity and time - delay of decoding, proving that it has certain practical value.

关 键 词：TURBO码 分量译码器 FPGA 

分 类 号：TN91[电子电信—通信与信息系统]