十亿晶体管处理器体系结构研究  

Research on the Billion-Transistor Architecture of Processors

作　　者：温璞[1] 杨学军[1] 

机构地区：[1]国防科技大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2007年第7期80-84,共5页Computer Engineering & Science

基　　金：国防科技大学校预研项目(CX0406018)

摘　　要：半导体工艺技术的飞速发展促使单芯片内集成有更多的晶体管资源。如何利用丰富的片上资源,已成为处理器体系结构研究的一个重点。本文综述了目前关于十亿晶体管处理器结构的研究现状,认为在缓解当前处理器面临的存储墙问题、功耗问题、线延迟问题以及充分利用片上资源等方面,PIM结构是一种有效的途径,而与向量结构相结合则更能体现PIM结构的高带宽、低延迟优势。Advances in semiconductor manufacturing will permit an unprecedented number of transistors on a single processor die. But what architecture will make the best use of these riches become a focus. After surveying the research of billion-transistor architectures, we focus on PIM, which integrates the CMOS logic with DRAM memories on the same die, and provide high bandwidth,low latency and low power. PIM makes the best use of giant on-chip budget, but also relaxes the eager memory-wall, power,and wire latency. Coupled with the vector processing logic, PIM can expose the advantages in itself.

关 键 词：十亿晶体管结构 存储墙 向量处理 Processor-in-Memory 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]