层次化片上网络结构的簇生成算法  

Cluster Generation Algorithm for Hierarchical Networks-on-Chip Architecture

作　　者：王宏伟[1] 陆俊林[1] 佟冬[1] 程旭[1] 

机构地区：[1]北京大学微处理器研究开发中心,北京100871

出　　处：《电子学报》2007年第5期916-920,共5页Acta Electronica Sinica

基　　金：国家863高技术研究发展计划(No.2004AA1Z1010)

摘　　要：半导体工艺的发展及嵌入式电子产品复杂度的不断增长,系统芯片互连结构的吞吐量、功耗、信号完整性、延迟以及时钟同步等问题更加复杂.基于总线的片上通信结构不足以提供良好的通信能力,出现了以片上网络为核心的通信结构.本文提出了层次化片上网络设计中,根据实现工艺和应用需求,进行层次划分的簇生成算法.实验表明,通过使用该算法,能够有效的分配系统芯片的内部通信,提高系统性能,降低硬件实现开销,同时满足一定的服务质量需求.With the development of VLSI technology and increasing complexity of embedded electronics products,Systemon-Chip （SeC） design encounters some problems, such as throughput, power, signal integrity, latency and clock synchronization. As bus-based on-chip communication architecture will not be able to serve future chips,Network-on-Chip （NoC） was introduced to solve the problems mentioned above. This paper puts forward a Cluster Generation （CG） algorithm in hierarchical NoC design, according to the technology and application requirements. Experiments show with CG algorithm, we may allocate on-chip communication effieiently,improve system performance,decrease hardware cost,and at the same time meet Quality-of-Service requirement.

关 键 词：系统芯片 片上网络 簇 层次化 算法 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]