基于FPGA的OFDM系统采样钟同步  

Sampling frequency synchronization for OFDM systems based on FPGA

作　　者：吴炜[1] 钱良[1] 徐友云[1] 

机构地区：[1]上海交通大学无线通信研究所,上海200240

出　　处：《信息技术》2007年第5期43-45,152,共4页Information Technology

基　　金：国家863项目(2003AA123310)

摘　　要：利用频域离散导频估计采样钟频偏,采用Farrow结构的数字内插滤波器完成采样钟频偏补偿,并且在充分考虑硬件可实现性下作了简化,从而实现了基于FPGA的全数字域采样钟同步模块,基于实测数据的分析表明,该模块不仅有稳定的性能,而且其模块化设计也有利于更高阶算法或多通道系统的实现。This paper uses scattered pilots to estimate sampling frequency error and Farrow structured filters to perform compensation. In consideration of the feasibility of hardware implementation, simplification is done to the algorithm and this all digital sampling synchronization module based on FPGA is implemented. The analy- sis of the data based on real test shows that this module has stable＇performance, and such modularized design can also be used in the implementation of higher order algorithms or mulfichannel systems.

关 键 词：采样钟同步 OFDM FPGA 

分 类 号：TN911[电子电信—通信与信息系统]