基于SimpleScalar的异构多核仿真器  

An Heterogeneous Multi-core Simulator Based on SimpleScalar

作　　者：林明亮[1] 祝永新[1] 

机构地区：[1]上海交通大学微电子学院,上海200030

出　　处：《微电子学与计算机》2007年第7期204-208,共5页Microelectronics & Computer

摘　　要：提出了一种基于SimpleScalar和SystemC的异构异步多核仿真器,不同运行频率的内核之间采用共享存储区实现通信及数据共享。实验结果表明该仿真器能够在时钟周期级正确模拟异构多核处理器的运行情况,并准确评估异构多核处理器的性能。该仿真器在异构多核系统的软硬件协同设计方面将有较好的应用前景。In this paper we propose a new heterogeneous multiprocessor simulator by integrating numerous SimplesSalar Instruction Set Simulator （ISS） with SystemC. Shared memory is used for the communication between the simulators of the two cores, which may be running on different frequencies. This paper statistically evaluates the performance of the heterogeneous multi-core simulator, and demonstrates proper simulation results. The contribution of this work is that it allows designers to exploit the SimpleSealar simulator capabilities for the multiprocessor systems design.

关 键 词：异构多核处理器 SimpleSealar SYSTEMC 核间通信 

分 类 号：TP39[自动化与计算机技术—计算机应用技术]