基于Open Vera的IIC总线接口功能验证平台的搭建  

Development of a function verification testbench of an IIC bus interface based on Open Vera

作　　者：贺珊[1] 张多利[1] 何伟[1] 

机构地区：[1]合肥工业大学电气与自动化工程学院,安徽合肥230009

出　　处：《合肥工业大学学报（自然科学版）》2007年第3期261-264,共4页Journal of Hefei University of Technology：Natural Science

基　　金：国家自然科学基金资助项目(60373076);国家自然科学基金资助项目(60576034)

摘　　要：文章讨论了基于Open Vera的功能验证平台的搭建方法,重点研究了如何挖掘Open Vera所支持的各种新技术和新功能,并与传统验证方法所搭建的验证平台进行了性能比较;表明该硬件验证语言的优势,对验证IP(VIP:Verification IP)的编写有一定的借鉴意义。The OpenVera is used to develop the function verification testbench of an IIC bus interface, Design Under Test（DUT）. Some new technologies and functions in OpenVera,such as the bus function model（BFM）,the constrained random test,and the self-checker module, are used. The perform- ance of the testbench using Vera is compared with that of the one based on Verilog, which shows the superiority of the presented method.

关 键 词：功能验证 OPEN VERA IIC总线接口 

分 类 号：N39[自然科学总论]