跳频码发生器的设计  

Design of FH codes producer

作　　者：姚晓亮 刘春河[1] 杨林杰 

机构地区：[1]山东大学威海分校,威海264209

出　　处：《国外电子测量技术》2007年第6期39-41,共3页Foreign Electronic Measurement Technology

摘　　要：系统以AT89S52单片机为控制核心，利用高速FPGA（Cyclone）来发生DDS信号，并对跳频信号进行控制，完成对跳频码发生器的设计。跳频信号采用DDS滤波实现。系统跳频输出频率范围为10-15MHz，单频输出时频率稳定度为1×10^-5、频率精确度为1×10^-6，最小频率间隔跳频为10kHz，最大允许输入跳频点为50个，跳频速率高达100000跳/秒。跳频点数和具体跳频点可由外界通过键盘输入给定。经测试，跳频速率较快，输出波形较好。The system takes the MCU of AT89S52 as control core, makes use of the FPGA（Cyclone） to produce the signal of DDS and control the FH signal, and realizes the design of FH signal producer. The FH signal is implemented by the felted DDS signal. When the signal frequency is single, the frequency ranges from 10 MHz to 15 MHz, the frequency stability is 1 × 10^-5 , the frequency accuracy is 1× 10^-6 , the minimum of hopping frequency interval is 10 kHz, the maximum allowable number of input hopping frequency is 50, and the rate of FH can reach 100,000 / s. The number and the specific point of FH need to be set by the keyboard input. The test result shows that the FH rate is fast and the output wave is accurate,

关 键 词：单片机 跳频码 FPGA 无源滤波 宽带功放 AGC 

分 类 号：TN911.3[电子电信—通信与信息系统]