32位RISC处理器中可配置乘法器的设计  

Besign of Configurable Multiplier in 32-bit RISC Processor

作　　者：李云[1] 张盛兵[1] 

机构地区：[1]西北工业大学,陕西西安710065

出　　处：《微电子学与计算机》2007年第8期49-51,55,共4页Microelectronics & Computer

摘　　要："ENOD"是某公司2006年设计的一款32位嵌入式RISC微处理器。其中的硬件乘法器位于设计的关键时序路径上,为优化乘法器的时序和提高其灵活性,采用Radix4-Booth算法,设计了单周期、流水线和多周期3种乘法器结构,在Modelsim中进行了功能仿真和时序仿真。采用中芯国际0.18μm的标准单元库将它们分别在DC中综合后,从功能、面积、速度等方面对这3种乘法器结构做了定量分析,指出了它们各自的优缺点及应用场合。在"ENOD"的应用中,根据具体的应用通过设置参数选择最合适的乘法器结构,灵活性好,性能/面积比高。＂ENOD＂ is a 32-bit embedded RISC processor designed by a company in 2006. The multiplier in ＂ENOD＂ is on the critical timing path, for improve its performance and flexibility, this paper has implemented three various multiplier-single-cycle, pipeline and muhi-cycle based on Radx-booth4. After run simulation in Modelsim and synthesis in Design Compiler based on SMIC0.18 standard cell, compared them from the perspective of function, area and speed, as a result of that, analyzed their pros and cons, suitable application fields. In the application of ENOD, according to the specified application field, configured it to the most suitable multiplier by set parameter. It has very high flexibility and performance area ratio.

关 键 词：可配置 乘法器 单周期 流水线 多周期 

分 类 号：TP273.5[自动化与计算机技术—检测技术与自动化装置]